Comparator trees for winner-take-all circuits

David Cyril Hendry

Research output: Contribution to journalArticle

15 Citations (Scopus)

Abstract

This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. (C) 2004 Elsevier B.V. All rights reserved.

Original languageEnglish
Pages (from-to)389-403
Number of pages14
JournalNeurocomputing
Volume62
DOIs
Publication statusPublished - Dec 2004

Keywords

  • self organising map
  • hardware implementations
  • winner-take-all
  • comparator trees
  • IMPLEMENTATION

Cite this

Comparator trees for winner-take-all circuits. / Hendry, David Cyril.

In: Neurocomputing, Vol. 62, 12.2004, p. 389-403.

Research output: Contribution to journalArticle

Hendry, David Cyril. / Comparator trees for winner-take-all circuits. In: Neurocomputing. 2004 ; Vol. 62. pp. 389-403.
@article{10156898a62d46468018d94399250c21,
title = "Comparator trees for winner-take-all circuits",
abstract = "This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. (C) 2004 Elsevier B.V. All rights reserved.",
keywords = "self organising map, hardware implementations, winner-take-all, comparator trees, IMPLEMENTATION",
author = "Hendry, {David Cyril}",
year = "2004",
month = "12",
doi = "10.1016/J.NEUCOM.2004.05.002",
language = "English",
volume = "62",
pages = "389--403",
journal = "Neurocomputing",
issn = "0925-2312",
publisher = "ELSEVIER SCIENCE BV",

}

TY - JOUR

T1 - Comparator trees for winner-take-all circuits

AU - Hendry, David Cyril

PY - 2004/12

Y1 - 2004/12

N2 - This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. (C) 2004 Elsevier B.V. All rights reserved.

AB - This paper presents architectures for comparator trees capable of finding the minimum value of a large number of inputs. Such circuits are of general applicability although the intended application for which the circuits were designed is the winner-take-all function of a digital implementation of a neural network based on the self organising map. Mechanisms for reducing delay based on look-ahead logic within individual comparators and mechanisms based on multiplexor architectures of a comparator are compared for both propagation delay and area. (C) 2004 Elsevier B.V. All rights reserved.

KW - self organising map

KW - hardware implementations

KW - winner-take-all

KW - comparator trees

KW - IMPLEMENTATION

U2 - 10.1016/J.NEUCOM.2004.05.002

DO - 10.1016/J.NEUCOM.2004.05.002

M3 - Article

VL - 62

SP - 389

EP - 403

JO - Neurocomputing

JF - Neurocomputing

SN - 0925-2312

ER -