A simulation and evaluation scheme for Single Event Effects in VLSI

Yufan Lu; Xin Chen; Xiaojun Zhai; Sangeet Saha; Shoaib Ehsan; Jinya Su; Klaus  McDonald-Maier

A simulation and evaluation scheme for Single Event Effects in VLSI

Yufan Lu, Xin Chen, Xiaojun Zhai, Sangeet Saha, Shoaib Ehsan, Jinya Su, Klaus McDonald-Maier

Research output: Chapter in Book/Report/Conference proceeding › Published conference contribution

Abstract

Due to the complexity of large scale integrated circuits, it can become time consuming to analyse Single Event Effect (SEE) in large circuits. Hence, this paper proposes a rapid
simulation scheme for large scale circuits. It takes advantage of transistor simulation tools and VLSI digital simulation tools to achieve both high accuracy and efficiency. The experiment results
show that one million SEEs can be injected into the S27 circuit in 55 s, while the HSPICE simulation takes 67000 times longer

Original language	English
Title of host publication	AMICSA 2021
Publication status	Published - 21 May 2021

Keywords

Single event effect
fault injection
SEE model
SEE mitigation
HDL simulation
VLSI

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Cite this

@inproceedings{4a6e643b7b2a45b89efa6711912d1380,

title = "A simulation and evaluation scheme for Single Event Effects in VLSI",

abstract = "Due to the complexity of large scale integrated circuits, it can become time consuming to analyse Single Event Effect (SEE) in large circuits. Hence, this paper proposes a rapidsimulation scheme for large scale circuits. It takes advantage of transistor simulation tools and VLSI digital simulation tools to achieve both high accuracy and efficiency. The experiment resultsshow that one million SEEs can be injected into the S27 circuit in 55 s, while the HSPICE simulation takes 67000 times longer",

keywords = "Single event effect, fault injection, SEE model, SEE mitigation, HDL simulation, VLSI",

author = "Yufan Lu and Xin Chen and Xiaojun Zhai and Sangeet Saha and Shoaib Ehsan and Jinya Su and Klaus McDonald-Maier",

note = "This work is supported by the UK Engineering and Physical Sciences Research Council through grants This work is supported by the UK Engineering and Physical Sciences Research Council through grants EP/R02572X/1, EP/V034111/1, EP/V000462/1 and EP/P017487/1., EP/V034111/1, EP/V000462/1 and EP/P017487/1.",

year = "2021",

month = may,

day = "21",

language = "English",

booktitle = "AMICSA 2021",

}

TY - GEN

T1 - A simulation and evaluation scheme for Single Event Effects in VLSI

AU - Lu, Yufan

AU - Chen, Xin

AU - Zhai, Xiaojun

AU - Saha, Sangeet

AU - Ehsan, Shoaib

AU - Su, Jinya

AU - McDonald-Maier, Klaus

N1 - This work is supported by the UK Engineering and Physical Sciences Research Council through grants This work is supported by the UK Engineering and Physical Sciences Research Council through grants EP/R02572X/1, EP/V034111/1, EP/V000462/1 and EP/P017487/1., EP/V034111/1, EP/V000462/1 and EP/P017487/1.

PY - 2021/5/21

Y1 - 2021/5/21

N2 - Due to the complexity of large scale integrated circuits, it can become time consuming to analyse Single Event Effect (SEE) in large circuits. Hence, this paper proposes a rapidsimulation scheme for large scale circuits. It takes advantage of transistor simulation tools and VLSI digital simulation tools to achieve both high accuracy and efficiency. The experiment resultsshow that one million SEEs can be injected into the S27 circuit in 55 s, while the HSPICE simulation takes 67000 times longer

AB - Due to the complexity of large scale integrated circuits, it can become time consuming to analyse Single Event Effect (SEE) in large circuits. Hence, this paper proposes a rapidsimulation scheme for large scale circuits. It takes advantage of transistor simulation tools and VLSI digital simulation tools to achieve both high accuracy and efficiency. The experiment resultsshow that one million SEEs can be injected into the S27 circuit in 55 s, while the HSPICE simulation takes 67000 times longer

KW - Single event effect

KW - fault injection

KW - SEE model

KW - SEE mitigation

KW - HDL simulation

KW - VLSI

M3 - Published conference contribution

BT - AMICSA 2021

ER -

A simulation and evaluation scheme for Single Event Effects in VLSI

Abstract

Keywords

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Cite this